Project Settings Project Name TwoMult_8_tap_FIR_syn Implementation Name synthesis Top Module work.TwoMult_8_tap_FIR Retiming 0 Resource Sharing 1 Fanout Guide 10000 Disable I/O Insertion 0 FSM Compiler 1 Run Status Job Name Status CPU Time Real Time Memory Date/Time Compile Input Complete 17 87 0 - 0m:00s - 5/22/2014 2:27:35 PM Pre-mapping Complete 3 1 0 0m:00s 0m:00s 133MB 5/22/2014 2:27:37 PM Map & Optimize Complete 11 13 0 0m:01s 0m:01s 133MB 5/22/2014 2:27:39 PM Area Summary Carry Cells 6 Sequential Cells 113 DSP Blocks (MACC) (dsp_used) 3 I/O Cells 65 Global Clock Buffers 2 Block Rams (RAM64x18) (v_ram) 2 LUTs (total_luts) 21 Timing Summary Clock Name Req Freq Est Freq Slack TwoMult_8_tap_FIR|clk 395.2 MHz 335.9 MHz -0.447 System 1211.1 MHz 1029.4 MHz -0.146 Optimizations Summary Combined Clock Conversion 1 / 0